The SPE program reads in the input buffer, processes the data, and then writes it to the output buffer. SPE程序从输入缓冲区中读取数据,然后对数据进行处理,再将结果写入输出缓冲区中。
The simplest usage is to have the SPE program take two pointers: one for an input buffer and one for an output buffer. 最简单的用法是让SPE程序使用两个指针:一个用于输入缓冲区,另外一个用于输出缓冲区。
Clearly, the entire input buffer hasn't been consumed while parsing, which is why status is0. 显然,解析期间整个输入缓冲区都没有被使用,因此status为0。
Program control low frequency pulse treatment caller's input buffer 程控低频脉冲治疗仪调入程序输入缓冲器
Specifies the size, in bytes, of the driver's internal input buffer. A value of zero indicates that the value is unavailable. 指定驱动程序内部输入缓冲区的大小,单位为字节。零表示值不可用。
The current contents of process 'input buffer are'% 1 '. 进程输入缓冲区的当前内容为''%1''。
The second character surrogate pair is not in the input buffer to be written. 第二个字符代理项对不在要写的输入缓冲区中。
For example, a console input buffer handle is signaled when there is unread input, such as a keystroke or mouse button click. 比如,控制台输入buf句柄被标记当还有待读取的输入,比如按键或者鼠标点击。(保证用户的输入被执行)。
Gets or sets the number of bytes in the internal input buffer before a. 事件发生前内部输入缓冲区中的字节数。
This method removes all data in the input buffer for$ obj. 这个方式是清空对象的输入缓冲区的数据。
It analyses some factors which constrain the buffer's performance, including gain, common-mode response and linearity of input buffer. Based on improvements on these factors, the whole performance of input buffer is greatly improved. 对输入buffer分析了增益、共模响应、线性度等制约性能的因素,通过电路改进使性能大大提高;
The paper first presents a model to describe the switch, then analyzes the model and gets the packet loss probabilities of input buffer and output buffer under finite buffer capacity. 文中首先建立了描述交换网络的模型,然后分析了在有限缓存客量下在输入队和输出队中分组的丢失率。
Simulation of K-Window Input Buffer for ATM Switching Network K-窗口输入缓存ATM交换网的仿真
In this paper, an analysis method on input buffer limitation is discussed, and its generalized stochastic Petri nets model and reachability graph are built. Therefore, input buffer limitation mechanism can be described and analyzed. 提出了一种限制输入缓存器方案的广义随机Petri网模型,并给出了可达图及MC,从而可描述、分析限制输入缓存器方案的入口模式。
The improved model of input buffer presented is to insert a quasi random memory between input queue and arbitration logic at ATM switching unit. 改进的输入缓冲方案是在ATM交换单元的输入队列和仲裁逻辑之间加入一个准随机存储器。
An Improved Model of Input Buffer at ATM Switching Unit ATM交换单元输入缓冲方案的改进
Research on Switch Fabric Based on Input Buffer Manager 基于输入缓冲的交换结构研究
The Research on an Analysis Method for Input Buffer Limitation 一种限制输入缓存器的分析方法
An ATM Switch with Shared-Memory Input Buffer and Expansive Ports 一种端口扩展、输入缓存共享的ATM交换结构
As an input buffer of GaAs frequency divider and D-F/ F, it has shown satisfactory results. 作为输入缓冲级用于GaAs高速分频器和D触发器电路,已得到初步结果。
A study on the input buffer and system control unit in HDTV video decoder HDTV视频解码器输入缓存及系统控制单元的研究
This paper describes the implementation of buffer manager that is used in switch circuit, provides a request shift method to handle the latency between input buffer and central arbitration. 研究了交换控制电路中基于输入缓冲的交换结构,提出了一种请求移位的方法处理输入缓冲和中央仲裁器之间的仲裁延时;
This paper introduces exhausting and gated polling system~ [ 1,2] in input buffer of ATM switch, analyse the priority performances based on mixed service. 文章在ATM交换机输入缓存队列中引入完全、门限服务规则[1,2],探讨混合服务规则下的输入缓存优先级特性。
Input Buffer Control for Practical Real time MPEG 2 Decoders MPEG2实时解码中的输入缓冲器控制
In addition, we will introduce the I/ O protection circuits, input buffer and the output buffer, witch will insure the safety of drivers. 另外为了保护电路安全工作,我们还给出了输入保护电路、输出保护电路,输入缓冲器和输出缓冲器,并对各个电路选取的理论依据和实际应用场合给予了详细的介绍。
By analyzing discrete queuing model, the thesis has a research about the performance of input buffer management, output buffer management and share buffer management. Cell loss probability, throughout, cell delay and buffer utilization are presented by theoretic analysis. 通过对离散排队模型的分析,研究了输入缓冲、输出缓冲和共享缓冲的性能,从信元丢失率、吞吐量、时延和缓冲器利用率等方面进行了理论分析。
Bus module is responsible for moving data from the input port buffer to the output port buffer. 总线模块负责将输入端口缓存的数据搬移到输出端口缓存。
To test the high frequency characteristics, an input buffer with depth of 8 is designed. 设计了深度为8的输入缓冲器,保证了该测试方案能够获得被测电路的高频特性。
The protocol converter based on the integration architecture above includes wireless industrial control networks ( WICN) master module and TCP server module. And the two modules have their own separate input buffer and output buffer. 基于该集成架构的协议转换器包括无线工业控制网络(WICN)主站模块与TCP服务器端模块,它们拥有各自独立的输入缓冲区和输出缓冲区。
Gilbert unit is used as the core circuit of mixer and output signal of the locate oscillator is amplified by adding an input buffer, which makes the MOSFET work on a better switching state, then the linearity performance of mixer can be improved. 采用吉尔伯特单元为核心的混频器,前级增加输入缓冲级对本振信号进行放大,使得工作在开关状态的晶体管具有更好的开关特性,优化了混频器的线性度。